1.
Vijayaprabhuvel Rajavel. Integrating Power-Saving Techniques into Design for Testability of Semiconductors for Power-Efficient Testing. tajet [Internet]. 2025 Mar. 27 [cited 2025 Aug. 3];7(03):243-51. Available from: https://www.theamericanjournals.com/index.php/tajet/article/view/5997